issue 3 - april 2007 1 www.zetex.com ? zetex semiconductors plc 2007 ZXCT1032 high-side inrush controller and electronic fuse description ordering information the ZXCT1032 is a high-side current monitor that drives a pmos or pnp transistor to provide in-rush current limit and over-current protection. the ZXCT1032 includes a high accuracy high-side current monitor, a start-up timer and a re-try inhibit timer. the ZXCT1032 takes the voltage developed across a current shunt resistor and compares this with an externally set trip point. it works in three modes: ? linear soft-start ? over-current detector ? over-current disconnect/fuse linear soft-start upon power up the ZXCT1032 enters a linear soft-start mode. during which the output current ramps up from zero to a maximum user defined trip point. the trip point is set by the voltage on i set pin and r sense . the ramp rate is determined by capacitor c t . the soft start ensures th at capacitive loads are smoothly charged without causing excessive power supply startup transients. over-current detectior when external capacitor ct has charged up above the v iset the ZXCT1032 switches from its soft-start mode to its over-current detection mode. during this mode the external mosfet will be fully enhanced reducing the its voltage drop and power dissipation. while in this mode the internal current monitor continually checks th e output current and compares it to the trip-current level determined by v iset . over-current disconnect/fuse if the trip current limit is exceeded at any time the ZXCT1032 enters its over-current disconnect mode. the drive pin is driven high, turning the pass mosfet off; the flag output goes low indicating a fault. the drive and flag outputs are latched in these states for a period determined by c t , v iset and the internally set discharge current (3a typical). after c t has discharged to 80mv the ZXCT1032 will restart into its linear soft-start mode. the c t charge and discharge times have been ratioed to so that the power dissipation in the pass mosfet should allow indefinite operation in the event of a continuous load failure. pin 3 description: determines the load current trip level or constant current level. iset can be left open circuit (internal 2.1v reference) or driven via a dc voltage or c pwm output. its source impedance is 50k . features ? accurate high-side current sensing ? user defined and dynamically adjustable trip current ? load switch control ? fault flag logic output ? user defined ramp and inhibit timers ? so8 package ? temperature range -40 to 85c applications ? electronic fuse ? short circuit protected supply feed ?hot swap ? power over twisted pair order code pack part mark reel size tape width quantity per reel ZXCT1032n8ta so8 1032 7? 12mm 500
ZXCT1032 issue 3 - april 2007 2 www.zetex.com ? zetex semiconductors plc 2007 pin description typical application circuit pinout connections pin name description 1 gnd ground reference for i set and flag pins. most negative terminal of the device. no other pin should go below this voltage. 2c t an external capacitor is connected to this pin and is used to determine the period for constant-current mode and the timeout before restarting. to reduce excessive heating during th e soft start mode capacitors less than 220nf are reocmmended. 3 iset determines the load current trip level or constant current level. this can be driven via a dc voltage or via a c pwm output. v sense = (v iset -150mv)/10 an input <100mv will disable the high-side switch (i.e. set i out = 0) if left open-circuit, an accurate internal dc reference of 2.1v and source impedance of 50k is used to set the voltage on this pin. (external drivers must take this reference into account.) 4 flag this is an active low open collector output that goes low whenever the current limit set by the choice of r sense and i set is reached or in the event of a shorted load. 5 drive this is the output drive pin to th e external high side referred switch on the ZXCT1032, capable of driving pmos and pnp transistors. 6 in- the load referred input to the current monitor control loop. 7 n/c not connected 8 in+ acts as both the supply pin to the ZXCT1032 and the supply referred sense input to the current monitor control loop. v in load zxct 1032 in+ i set gnd in- 8 6 1 3 drive c t gnd c t 5 2 flag c 4 r sense gnd- c t iset flag in+ 1 2 3 4 8 7 6 5 n/c in- drive top view so 8
ZXCT1032 issue 3 - april 2007 3 www.zetex.com ? zetex semiconductors plc 2007 absolute maximum ratings v in+ max (a) ...................................................................................................... 28 v voltage on any pin relative to gnd ............................................................. -0.6v and v in +0.5 v maximum differential voltage between v in+ and v in- (v sense ) ................ 500 mv junction temperature range ........................................................................ -40 to 150c storage temperature range .......................................................................... -55 to 150c operation above the absolute maximum rating may cause device failure. operation at the absolute maximum ratings, for extended periods, may reduce device reliability. notes: (a) up to a maximum of 24 hours recommended opera ting conditions electrical characteristics test conditions t amb = 25c, v in+ = 20v. unless otherwise stated. symbol parameter min. max. units v in+ supply range 9.5 21 v t a ambient temperature range -40 85 c v flag flag voltage range 0 v in+ v v iset voltage on iset pin 1 2.5 v symbol parameter conditions min. typ. max. units i q quiescent current v sense 1 = 0v, v_ iset = 2.1v 1.6 2.5 ma v strip (*) notes: (*) v sense = v in+ - v in- . v strip is the sense voltage at which the devi ce trips into over-current protection. flag trip threshold voltage v iset =1.1v 95 mv v iset =2.1v 185 195 205 v iset iset open voltage i iset = 0 2.0 2.1 2.2 v i iset iset output current v iset =0v 30 45 60 a v driveh drive high output voltage v iset = 2.1v, v sense > 205mv, i drive = 0, v in- ? 0.4 v in- ? 0.2 v v drivel drive low output voltage v iset = 2.1v, v sense < 185mv, i drive = 0, v in- - 7 v in- - 5.5 v in- - 4 v r drivel drive low output resistance v iset = 2.1v, v sense < 185mv 9k v flagl flag low output voltage v iset = 2.1v, v sense > 205mv i flag = 100a 0.2 0.4 v i flagz flag open circuit leakage current v iset = 2.1v, v sense < 185mv, v flag = 5v 1200na i in- in- bias current v iset = 0v 100 200 na v strip-tc temperature coefficient of trip voltage see footnote (?) (?) temperature dependent measurements are extracted from characterization and simulation results. 95 ppm/c i ct-chg capacitor c t charging current flag = open 130 200 270 a i ct-dis capacitor c t discharging current flag = low 1.8 3.3 5.4 a
ZXCT1032 issue 3 - april 2007 4 www.zetex.com ? zetex semiconductors plc 2007 typical characteristics (t a = 25c and v in+ = 20v unless otherwise stated) quiescent current vs temperature 0.00 0.30 0.60 0.90 -40 -15 10 35 60 85 te mpe rature (c) i q (ma) i q (ma) quiescent current vs input voltage 0.77 0.78 0.79 0.80 9 11 13 15 17 19 21 input voltage v iset vs temperature 2.00 2.05 2.10 2.15 2.20 -40 -15 10 35 60 85 temperature (c) v in+ = 9.5 to 21v v iset vs input voltage 2.099 2.100 2.101 9 10 11 12 13 14 15 16 17 18 19 20 21 input voltage (v) v iset (v) v iset (v) t a = 25c i in - vs input voltage 0 5 10 15 20 25 30 35 40 9 11 13 15 17 19 21 input voltage (v) t a = 25c i in - vs temperature 0 5 10 15 20 25 30 35 40 45 50 -40 -15 10 35 60 85 temperature (c) i in - (na) i in - (na) v in+ =9.5v v in+ =20v v in+ =21v v in+ = 9.5 to 21v
ZXCT1032 issue 3 - april 2007 5 www.zetex.com ? zetex semiconductors plc 2007 typical characteristics (t a = 25c and v in+ = 20v unless otherwise stated) i ct-chg vs temperature -250 -225 -200 -175 -150 -125 -100 -75 -50 -25 0 -40 -15 10 35 60 85 temperature (c) v in+ = 9.5 to 21v i ct-dis vs temperature 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 -40 -15 10 35 60 85 temperature (c) i c-dis (ua) i c-dis (ua) v in+ = 9.5 to 21v i ct-dis vs input voltage 3.70 3.71 3.72 3.73 3.74 3.75 9 111315171921 input voltage (v) t a =25c i ct-chg vs input voltage -208 -207.5 -207 -206.5 9111315171921 input voltage (v) i c-chg (ua) i c-chg (ua) t a = 25c
ZXCT1032 issue 3 - april 2007 6 www.zetex.com ? zetex semiconductors plc 2007 application information ZXCT1032 block diagram and description operation of the ZXCT1032 1 after power-up, the timing capacitor (c t ) is charged up by a 200a current source. this causes the output amplifier's drive pin to fall in voltage, progressively turning on the pmos transistor. the load current is monitored by the current monitor and the amplifier control loop controls the load current allowing it to increase gradually (soft-start mode) as the voltage on c t increases. during the soft-start phase the load cu rrent will start to build up while there is a large voltage across the pass mosfet; this ca n lead to large power dissipation if large capacitive loads are driven and/or large c t is used. ZXCT1032 load flag drive in+ in- c t c t gnd i set 200 a 3.3 a 2.1v 80mv (1) (2) (3) (4) (5) (6) (8) r sense i ct-chg i ct dis 50k - - + + + + - - - - nc ZXCT1032 start up characteristic 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 time - ms voltages - v 0 0.2 0.4 0.6 0.8 1 1.2 load current - a v iset v ct 10*v sense i load v in+ = 18v r sense = 0.2 c t = 220nf v iset = 2.1v trip current = 1a
ZXCT1032 issue 3 - april 2007 7 www.zetex.com ? zetex semiconductors plc 2007 2 the output voltage also increases due to the load current powering up the load and charging any capacitance. after the initial soft start (load current stabilizing) the timing capacitor charges up to 4v and the device enters its normal mode of operation. the external mosfet will be now fully enhanced minimizing any serial voltage drop. the ZXCT1032 has now entered its over-current detector mode; it is effectively ?transparent? to the load until the current monitor output exceeds the trip point. 3 fuse operation is provided by the trip comp arator whose threshold voltage is set by v iset (internally nominally 2.1v, although this threshold can easily be overdriven). as the load current increases, so does the monitor voltage. when the current monitor output voltage exceeds v iset , the trip comparator output goes high and sets the latch with the following results: a the output drive is disabled. b the open collector flag output goes low to indicate a fault condition. c the 200 a current source is turned off and c t starts to discharge slowly via a 3.3 a current source. ZXCT1032 normal operation 0 2 4 6 8 10 12 14 16 18 20 0 5 10 15 20 time ms timing capacitor voltage - v 0 0.2 0.4 0.6 0.8 1 load current - a v ct i load v in+ = 18v r sense = 0.2 c t = 220nf v iset = 2.1v trip current = 1a 10*v sense v iset v load ZXCT1032 timing in over-current condition 0 0.5 1 1.5 2 2.5 0 5 1 0 0 1 0 5 0 time (ms) voltages - v 0 0.5 1 1.5 2 2.5 load current - a v in+ = 18 v r sense = 0.2 ? i load > 1 a c t = 220 nf v iset = 2.1 v trip current = 1 a v iset v ct i load
ZXCT1032 issue 3 - april 2007 8 www.zetex.com ? zetex semiconductors plc 2007 4when c t has discharged to "zero" (< 80mv) the latc h is reset which re-enables the output drive and allows the device to re-enter soft-start mode. 5 in the event of an overload or short circuit, stages 3 and 4 repeat indefinitely until the fault is removed. in the case of a permanent fault damage to the pmos transistor should not occur because it is only on for a short part of the overall cycle. 6 the current monitor has an intentional output offset of +150mv. if v iset is held at 0v, the output of the trip comparator will be permanently hi gh and the output will be completely disabled.
ZXCT1032 issue 3 - april 2007 9 www.zetex.com ? zetex semiconductors plc 2007 package outline - so8 note: controlling dimensions are in inches. approx imate dimensions are provided in millimeters dim inches millimeters dim inches millimeters min. max. min. max. min. max. min. max. a 0.053 0.069 1.35 1.75 e 0.050 bsc 1.27 bsc a1 0.004 0.010 0.10 0.25 b 0.013 0.020 0.33 0.51 d 0.189 0.197 4.80 5.00 c 0.008 0.010 0.19 0.25 h 0.228 0.244 5.80 6.20 0 8 0 8 e 0.150 0.157 3.80 4.00 h 0.010 0.020 0.25 0.50 l 0.016 0.050 0.40 1.27 - - - - -
ZXCT1032 issue 3 - april 2007 10 www.zetex.com ? zetex semiconductors plc 2007 zetex sales offices europe zetex gmbh kustermann-park balanstra?e 59 d-81541 mnchen germany telefon: (49) 89 45 49 49 0 fax: (49) 89 45 49 49 49 europe.sales@zetex.com americas zetex inc 700 veterans memorial highway hauppauge, ny 11788 usa telephone: (1) 631 360 2222 fax: (1) 631 360 8222 usa.sales@zetex.com asia pacific zetex (asia ltd) 3701-04 metroplaza tower 1 hing fong road, kwai fong hong kong telephone: (852) 26100 611 fax: (852) 24250 494 asia.sales@zetex.com corporate headquarters zetex semiconductors plc zetex technology park, chadderton oldham, ol9 9ll united kingdom telephone: (44) 161 622 4444 fax: (44) 161 622 4446 hq@zetex.com ? 2007 published by zetex semiconductors plc definitions product change zetex semiconductors reserves the right to alter, without notice, specifications, design, price or conditions of supply of any product or service. customers are solely responsible for obtaining th e latest relevant information before placing orders. applications disclaimer the circuits in this design/application note are offered as desi gn ideas. it is the responsibility of the user to ensure that t he circuit is fit for the user?s application and meets with the user?s requirements. no representation or warranty is given and no liability whatsoev er is assumed by zetex with respect to the accuracy or use of such in formation, or infringement of patents or other intellectual prop erty rights arising from such use or otherwise. zetex does not assume any le gal responsibility or will not be held legally liable (whether in contract, tort (including negligence), breach of statutory duty, restricti on or otherwise) for any damages, loss of profit, business, con tract, opportunity or consequential loss in the use of th ese circuit applications, under any circumstances. life support zetex products are specifically not authorized for use as critic al components in life support devices or systems without the ex press written approval of the chief executive officer of zetex semiconductors plc. as used herein: a. life support devices or systems are devices or systems which: 1. are intended to implant into the body or 2. support or sustain life and whose failure to perform when proper ly used in accordance with instructions for use provided in t he labelling can be reasonably expected to result in significant injury to the user. b. a critical component is any component in a life support devi ce or system whose failure to pe rform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. reproduction the product specifications contained in this publication are issu ed to provide outline information only which (unless agreed by the company in writing) may not be used, applied or reproduced for any purpose or form part of any order or contract or be regarded as a representation relating to the pr oducts or services concerned. terms and conditions all products are sold subjects to zetex? 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future device intended for production at some point. samples may be available ?active? product status recommended for new designs ?last time buy (ltb)? device will be discontinued and last time buy period and delivery is in effect ?not recommended for new designs? device is still in production to support existing designs and production ?obsolete? production ha s been discontinued datasheet status key: ?draft version? this term denotes a very early datasheet ver sion and contains highly provisional information, which may change in any manner without notice. ?provisional version? this term denotes a pre-release datasheet. it provides a clear indication of anticipated performance. however, changes to the test conditions and specif ications may occur, at any time and without notice. ?issue? this term denotes an issued datasheet cont aining finalized specifications. however, changes to specifications may occur, at any time and without notice.
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